Verifikation effizient automatisieren
ESD-Schutz für 2,5D-/3D-ICs
Fortsetzung des Artikels von Teil 2
Literatur
[1] ESD Technical Report for ESD Electronic Design Automation Checks.
EO S/ESD Association, TR 18.0-01-14, 2015,
www.esda.org/store/standards/product/4/esd-tr18-0-01-14.
[2] Lescot, J.; et al.: A comprehensive ESD verification flow at transistor
level for large SoC designs. 37th Electrical Overstress/Electrostatic
Discharge Symposium (EO S/ESD), 27.9.–2.10.2015, DO I: 10.1109/EO -
SESD.2015.7314740.
[3] Electrostatic Discharge (ESD) in 3D-IC Packages. Global Semiconductor
Alliance (GSA), Whitepaper, 14.1.2015, pdf" title="https://www.3dincites.com/wpcontent/ uploads/GSA-ESDA -3D-IC_ESD_Whitepaper_1.pdf">www.3dincites.com/wpcontent/
uploads/GSA-ESDA -3D-IC_ESD_Whitepaper_1.pdf.
[4] Medhat, D.; Dessouky, M. und Khalil, D.: Electrostatic Discharge
Physical Verification of 2.5D/3D Integrated Circuits. 21st International
Symposium on Quality Electronic Design (ISQED ), 25.–26.3.2020, Konferenzband,
S. 383–388, DO I: 10.1109/ISQED 48828.2020.9137046.
[5] Medhat, D.; Dessouky, M. und Khalil, D.: A Programmable Checker
for Automated 2.5-D/3-D IC ESD Verification. IEEE Transactions on
Components, Packaging and Manufacturing Technology, 2021, H. 1,
S. 25–35, DO I: 10.1109/TCPMT.2020.3039608.
[6] Overview Calibre PER C, Siemens Digital Industries Software. Website
https://eda.sw.siemens.com/en-US/ic/calibre-design/reliabilityverification/
perc/.
Jobangebote+ passend zum Thema
- ESD-Schutz für 2,5D-/3D-ICs
- Gibt es eine eigene Methode zur automatisierten ESD-Verifizierung in 2,5D- und 3D-ICs?
- Literatur
Lesen Sie mehr zum Thema
