7 Key Changes, Analog Designers Will Need to Make

4. Use Digital Calibration to Correct Analog Errors

FinFET lithography is extremely accurate, which should yield to better components matching. However, the area of the components tends to be smaller than in planar geometries. As matching is inversely proportional to square-root of the device area, this results in large offset in comparators or mismatch in mirrors.

Trying to address this problem by working on the device’s dimensions may not succeed. FinFET logic gates are small and low power, so wherever possible, it is prudent (and much cheaper) to resort to digital calibrations to remove matching errors.

1. 7 Key Changes, Analog Designers Will Need to Make
2. 1. Do not Mix Devices Having Different Dimensions
3. 2. Use Repeatable Patterns
4. 3. Estimate Interconnect Parasitics From the Start
5. 4. Use Digital Calibration to Correct Analog Errors
6. 5. Current Density limits the Transmitter Output Power
7. 6. High Flicker Noise Corner Frequency
8. 7. Simulations Are Slow