RISC-V distinguishes between local and global interrupts, i.e. those that address a hart directly and those that are managed by a platform level interrupt controller. However, the PLIC does not contain a schedule for the interrupts, this has to be solved on processor level. An interrupt targets a hart of a certain level, interrupt enable bits enable or disable application specific interrupt sources. Interrupts here have thresholds for prioritization, and have buffers for status information. A handler monitors the entire interrupt process.
RISC-V aims at a minimal implementation for an application case: ideally a software only addresses the basic set RV32I and some proprietary extensions. Standard extensions should be used as widely as possible and should not have any naming conflicts with each other. The proprietary extensions represent a very specific scenario and can have contradictory names to the standard command set.
Name conflicts ultimately depend on the size of an encoding register,
which carries the entire implemented command set. There must be enough free places to be able to carry all desired commands. However, a certain amount of free space is deliberately available in all permitted encoding spaces in order to always be able to carry some new commands. If a larger encryption space becomes necessary for a conflict-free extension, this is called a greenfield extension. If the extension still fits into the existing encryption space, it is called a brownfield extension.