Currently available GaN technologies have their shortcomings. These are discussed in the following article followed by the presentation of a novel GaN technology that eliminates these shortcomings. These new devices are designed to be used as simply as silicon MOSFETs.
Currently, there are three common approaches for normally-off gallium nitride transistors on the market: the cascode solution, the discrete p-GaN gate solution and the monolithic approach, where the gate driver is fully integrated. Let us first discuss the flaws of the discrete p-GaN gate solution and the monolithic approach.
For enhancement-mode GaN devices, the threshold voltage Vth is about 1.2 V for solutions with ohmic p-GaN gate and 1.7 V for p-GaN gate with Schottky contact. Negative turn-off voltages are required to prevent such HEMTs (High Electron-Mobility Transistor) from unintentionally turning on again during high du/dt transients (parasitic turn-on). In addition, the gate voltage of such components is not allowed to exceed 7 V, otherwise the gate current increases exponentially.
If the driver is fully integrated, these parasitic effects can be reduced. However, this deprives the user of the flexibility to use low-cost, high-performance silicon-based gate drivers or gate drivers with integrated high-performance controllers. In addition, the monolithically integrated gate driver can cause additional losses due to the self-heating of the power transistor because of the thermal coupling on the chip. Furthermore, a fully integrated solution is difficult to be scaled up to higher power levels.
The shortcomings already mentioned – the low threshold voltage and the low maximum permitted gate voltage – do not apply to the cascode solution. The threshold voltage ranges from 2.3 to 3.5 V and the gate voltage range goes up to 20 V. The reason for this is that the silicon MOSFET connected in series with a depletion-mode normally-on HEMT. However, this solution incurs a multi-chip package and thus extra cost. In addition, the output charge is higher with a cascode than with a discrete depletion-mode HEMT. Furthermore, with a cascode, it is not possible to claim that there is no reverse recovery loss anymore – one of the main benefits of lateral GaN HEMTs compared to silicon superjunction MOSFETs.
In contrast, the ICeGaN devices from Gambridge GaN Devices (CGD) have a threshold voltage of about 3 V to suppress unintended turn-on events associated with high dv/dt. In addition, these devices can be operated at gate voltages of up to 20 V without sacrificing transconductance or the dynamic performance of the devices (Figure 1). Also, ICeGaN devices have no reverse recovery losses and a very low output charge, typical for enhancement-mode normally-off GaN HEMTs. Figure 2 depicts the ICeGaN chip, while Figure 3 shows its block diagram with main HEMT, sense HEMT, the sensing load and a schematic of the smart interface.
An important feature of the ICeGaN devices is the monolithically integrated Miller clamp. This accomplishes a dual purpose; on the one hand, it ensures that the main HEMT remains switched off even during fast switching or external transients, and on the other hand, it ensures that the main HEMT switches off quickly when the clamp is activated.
During switching on and while being switched on, an auxiliary HEMT (Auxiliary HEMT in Fig. 2) absorbs a defined part of the external gate voltage and thus protects the main HEMT from too high gate voltages. In addition, the absorbed amount of energy depends on the temperature to further improve the reliability of the p-GaN gate of the main HEMT. It is well known that the gate is more susceptible to excessive voltages at very low temperatures (e.g. -40 °C), which is why the maximum voltage that should be applied to a HEMT gate must be reduced at lower temperatures.
This is not possible with conventional solutions, since the voltage applied to the HEMT's gate is not regulated as a function of the operating temperature. In contrast, in ICeGaN devices, the auxiliary gate transistor is configured to absorb more voltage at lower temperatures, limiting the maximum voltage at the internal gate to a lower value (below 5.5 V). This increases the reliability of the device significantly.
Unlike conventional GaN HEMTs with Schottky or ohmic p-GaN gates, ICeGaN devices do not require additional Zener diodes to limit the gate voltage and do not require negative gate voltages to turn off the device safely. Ferrite beads are also not necessary, thus reducing the overall system cost. ICeGaN devices are easy to drive, as shown in Figure 4 for a single low-side switch and in Figure 5 for a half-bridge.
An ESD protection circuit is monolithically integrated into the smart interface. This is based on a charge-sensitive HEMT that absorbs any excessive energy when an external pin of the ICeGaN device is exposed to an ESD event.
In many power electronic systems, it is necessary to continuously monitor the current through the transistor in order to provide the necessary input data to the control chip. In conventional silicon MOSFETs and GaN transistors, a shunt resistor is connected in series with the transistor for this purpose (Figure 5, left). A voltage of typically up to 1 V is dropped across this resistor; this signal is fed into the control circuit.
In ICeGaN devices, the current measurement is monolithically integrated on the chip, making a series resistor obsolete (Figure 5, right). This overcomes all three major drawbacks of the conventional configuration. With conventional solutions, the entire current to be sensed passes through the additional resistor. This causes extra losses and reduces system efficiency. As a first point, CGD's solution reduces these losses to a fraction (Figure 6).
In addition, the source terminal of the ICeGaN device is at the electrical ground potential of the circuit and not at that of the current sensor. This solves the second problem of conventional current sensing, namely the additional electrical noise and coupling caused by the voltage difference between the source of the transistor and ground. Since electromagnetic compatibility is an extremely important property of a power supply system that is difficult to improve, this offers a significant advantage at system level and can shorten the development time with ICeGaN devices.
The third challenge addressed by current sensing with ICeGaN devices relates to heat dissipation. As already mentioned, the source connection of the main HEMT is on ground potential. This means that these devices can be directly thermally connected to the ground plane, the largest piece of copper on the system board and is therefore ideal for dissipating and distributing the waste heat from the components (Figure 7).
|Function||conventional GaN solution||ICeGaN|
|Control turn-on speed||2 resistors, 5 to 10 Ω (±1%, 200 mW)||
2 resistors, 5 to 10 Ω (±1%, 200 mW)
|Keep the driving voltage||2 resistors (±5%, 10 kΩ)||not needed|
|Hold negative voltage for turn-off||2 capacitors (47 nF/30 V)||not needed|
|Klemmen der positiven Gate-Spannung||2 Zener diodes (5,6 V/200 mW)||not needed|
|Klemmen der negativen Gate-Spannung||2 Zener diodes (5,6 V/200 mW)||not needed|
|Stabilisieren der Versorgungsspannung UDD||not needed||2 capacitors|
Table 1: Typical BOM comparison of a system featuring CGD ICeGaN with conventional GaN devices.
Table 1 exemplifies the bill of materials of external components required to operate a solution with ICeGaN devices and a conventional GaN solution. The main combined static and dynamic characteristics and key features of ICeGaN compared to silicon superjunction devices and other types of state-of-the-art GaN devices are listed in Table 2. The dynamic on-resistance (Dynamic Ron) of ICeGaN is comparable to that of other enhancement mode GaN devices using a p-GaN Schottky gate.
|Device Technology||Silicon Super-junction MOSFET||GaN Cascode||p-GaN gate Ohmic HEMT||p-GaN gate Schottky HEMT||ICeGaN|
|Specific on-resistance [mΩ·cm²]||8.0||2.8||3.2||3.2||3.2|
|Threshold voltage Vth [V||3.5||4.0||1.2||1.7||3.0|
|Maximum gate voltage [V]||20||20||6||7||20|
|RDS(on) · QG [mΩ·µC]||3.5||0.8||0.32||0.3||0.33|
|RDS(on) · Qoss [mΩ·µC]||21||6||2.3||3.3||3.6|
|RDS(on) · Qrr [mΩ·µC]||312||6||0||0||0|
Table 2: Characteristics of silicon superjunction MOSFETs and various gate drive implementations of GaN devices, including ICeGaN. In the case of the cascode, only the depletion-type GaN HEMT is included in the area-specific on-resistance, ignoring the silicon MOSFET.
ICeGaN can be scaled in blocking voltages from 100 V to 900 V and in power ranges from 40 W to 10 kW. Currently, Cambridge GaN Devices is focusing on 650 V devices with on-resistances of 200 mΩ, 130 mΩ and 55 mΩ, corresponding to an output power of 60 W to 4 kW. They are housed in either a 5x6 mm or an 8x8 mm DFN package.
There are a number of applications that may benefit from the high frequency and low conduction losses of ICeGaN devices, such as chargers, power supplies, lighting, UPS, wireless power, on-board chargers and high voltage DC-DC converters for electric vehicles and data centres. New applications in telecommunication systems, artificial intelligence (AI) systems and cryptocurrency mining are also emerging.
IGBTs are most commonly used for motor control applications today. However, these inherently lack reverse conduction and tend to have problems when the operating frequency rises above 20 kHz. GaN solutions based on a cascode solution have the drawback of relatively high reverse recovery losses. Enhancement-mode GaN HEMTs require additional external circuitry to clamp the gate voltage and negative gate voltages to turn them off. This is where ICeGaN devices can make a big contribution, because they can be driven with any silicon-based half-bridge driver and their reverse recovery losses are zero.