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Echtzeit-Applikationen

Echtzeitschranken für Multicore-Prozessoren

17. Juni 2024, 6:00 Uhr | Von Dr. Daniel Kästner

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Fortsetzung des Artikels von Teil 2

Literatur

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[3]. Kästner, D.; et al.: Automatic Sound Static Analysis for Integration Verification of AUTOSAR Software. SAE Technical Paper 2023-01-0591, SAE World Congress 2023, Detroit, April 2023. DOI: https://doi.org/10.4271/2023-01-0591.

[4] Souyris, J.; et al.: Computing the worst case execution time of an avionics program by abstract interpretation. Proceedings of the WCET Workshop, 2005.

[5] The industry standard for static timing analysis. AbsInt, Website, www.absint.com/ait.

[6] Cullmann, C.; et al.: Predictability Considerations in the Design of Multi-Core Embedded Systems. Ingénieurs de l‘Automobile, volume 807, 2010.

[7] Nowotsch, J.; et al.: Multi-core Interference-Sensitive WCET Analysis Leveraging Runtime Resource Capacity Enforcement. In ECRTS’14: Proceedings of the 26th Euromicro Conference on Real-Time Systems, July 2014.

[8] AMC-20 – Amendment 23. AMC 20-193 Use of multi-core processors. EASA, 2022.

[9] Hybrid worst-case timing analysis. AbsInt, Website, www.absint.com/timeweaver.

[10] Kästner, D.; et al.: Multi-core WCET Analysis Using Non-Intrusive Continuous Observation. In ERTS 2024: Embedded Real TimeSoftware and Systems, 12th European Congress, June 2024, Toulouse.