PLS Programmierbare Logik & Systeme provides comprehensive analysis, test and debugging functions for the latest generation of Aurix microcontrollers from Infineon. Starting immediately, developers can use the new functions on the latest version of the Universal Debug Engine (UDE).
Infineon's multi-core TC4x family SoCs are manufactured in 28nm technology and address a wide range of automotive applications. For example, e-mobility, ADAS as well as AI applications. They also master complex challenges in the area of domain and zone control. In doing so, the modules meet the high safety requirements with regard to autonomous driving. They consist of up to six processing cores of the TriCore v1.8 architecture, a special cyber security real time module (CSRM) as well as extensions for high-performance applications. New additions include the enhanced Generic Timer Module (eGTM) and components from the Aurix Accelerator Suite such as the converter DSPs (cDSP) on the analog-to-digital converters (ADC). Also, the Parallel Processing Unit (PPU) based on the Synopsys ARC-EV architecture, which enables mathematical modeling of complex heterogeneous systems.
Through its intuitive and user-friendly interface, the UDE of PLS Programmierbare Logik & Systeme ensures developers easy access to all TriCore v1.8 and special cores of the respective TC4x SoC. Thus, the tool enables the control of all cores for debugging, testing and in-depth system analysis within one debugger instance. Accordingly, it is not necessary to open separate debugger instances for the different core architectures such as the Synopsys ARC for the PPU or the GTM. Currently, the UDE allows debugging of C/C++ as well as assembler code, with PLS supporting all common compilers, especially those from HighTec, Synopsys and Tasking. PLS is also preparing support for the Synopsys MetaWare OpenCL C compiler for PPU code. For debugging the CSRM within the UDE, PLS also offers an extension package.
Depending on the partitioning of the applications running on the TC4x, developers can control the cores either all together, in groups or individually with run-mode debugging, i.e. with breakpoints or in single-step mode. Here, the UDE allows almost synchronous starting and stopping of the respective cores by exploiting the chip's own debug logic. Multi-core breakpoints also simplify the debugging of complex applications, especially in shared code. A multi-core breakpoint is always effective, regardless of which core is currently executing the code in use.
Furthermore, the UDE user interface can be flexibly adapted to the user's preferences and the requirements of the current debugging or test task. All windows in the debugger can be flexibly arranged, grouped or distributed across multiple monitors within the UDE interface. For example, the windows can display the source code or internal states such as variables, registers or graphical visualizations. In addition, perspectives allow you to define multiple views within a debugger session and switch between them - helpful when the developer wants to focus on a specific debugging task. For example, this may be the case with multicore debugging, when the developer wants to look in detail at analyzing the behavior of a core, or when performing performance measurements with profiling. Users can freely create perspectives and insert and arrange debugger windows without restriction.
For a fast time-to-market, developers can already use the UDE for pre-silicon development. For this, the UDE supports software testing and debugging on virtual prototypes from the Synopsys Virtualizer Development Kit for Aurix TC4x. This enables full-system simulation of the TC4x devices. For software debugging of the TriCore v1.8 cores, the UDE also includes the instruction set simulator »TSIM«. According to PLS, the UDE will also support on-chip and external trace in the course of the year. Developers will then have the Universal Emulation Configurator (UEC) available for the TC4x for flexible definition of trace tasks. In addition, the »UAD2next« and »UAD3+« devices of the Universal Access Device family will be adapted to the serial trace interface of the new Aurix generation.