Beijing/China-based GigaDevice Semiconductor has launched the GD32V series, a new family of 32-bit microcontrollers based on the open source RISC-V instruction set. Founded in 2005 in Silicon Valley, the company offers an end-to-end tool chain ranging from MCU chips to software libraries and development boards, spanning a complete RISC-V development ecosystem.
The GD32VF103 microcontroller includes a 32-bit RISC-V processor core that operates at 108 MHz. The core can directly access the integrated flash memory without waite states and thus achieves maximum efficiency. The memory subsystem includes up to 128 Kbytes of on-chip flash memory and 32 Kbytes of SRAM. A wide range of I/Os and peripheral modules are connected via two APB buses (Advanced Peripheral Bus). The microcontroller offers up to two 12-bit A/D converters, two 12-bit D/A converters, four 16-bit timers, two base timers and an advanced timer with PWM function as well as standard and extended communication interfaces: up to three SPIs, two I2Cs, three USARTs, two UARTs, two I2Ss, two CANs and one USB OTG. The RISC-V processor core is also closely coupled to a core-local interrupt controller (ECLIC -- Enhanced Core-Local Interrupt Controller), a SysTick timer, and an advanced debug unit.
The microcontrollers operate with a power supply of 2.6 to 3.6 V and are available in a temperature range from -40°C to +85°C. The microcontrollers can be used in a wide variety of applications. Multiple power-saving modes allow optimization between wake-up latency and power consumption, which is essential for developing low-power applications.
The above features make the GD32VF103 devices ideal for a variety of networked applications, including industrial controls, motor drives, power monitoring and alarm systems, consumer and portable devices, POS, vehicle GPS, LED displays and more.
The GD32V family of microcontrollers includes 14 derivatives with QFN36, LQFP48, LQFP64 and LQFP100 packaging options and is pin-compatible with GD32 MCUs with ARM Cortex cores. Applications can thus be ported quickly and easily from the ARM to the RISC-V architecture.
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