PCI Express 6.0 in Progress

The PCI-SIG announces a further doubling of the data rate for the PCI-Express bus.

This is achieved by introducing PAM-4 (Pulse Amplitude Modulation with 4 steps), i.e. a two-bit transmission with a data rate of up to 64 GT/s or 256 GB/s (x16 configuration). In addition, the specification contains a Low-Latency Forward Error Correction (FEC) with additional mechanisms to improve bandwidth efficiency. Backward compatibility with earlier generations is to be maintained.

PCI-SIG plans to publish the PCIe 6.0 specification as early as 2021. "Continuing the trend we set with the PCIe 5.0 specification, the PCIe 6.0 specification is on a fast schedule," said Al Yanes, chairman and president of PCI-SIG. "With the continued commitment of our member companies, we are well on the way to doubling bandwidth once again in a timeframe that will meet industry demand for throughput". Markets such as Artificial Intelligence, Machine Learning, Networking, Communication Systems, Storage, High-Performance Computing are expected to demand it.