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Cologne Chip/GlobalFoundries

FPGAs »Made in Germany«

05. März 2020, 12:29 Uhr   |  Iris Stroh

FPGAs »Made in Germany«
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Novel FPGAs from Cologne Chip

GateMate from Cologne Chip is a FPGA family with components of small to medium density. The company addresses a variety of applications in automation, communication, security, automotive, IoT, lighting, etc.

According to Cologne Chip, the company's GateMate family combines logic density, power consumption and package size with the »lowest cost in the market", making the devices suitable for university projects as well as high volume applications. The chips were not only designed in Germany, but are also manufactured in Germany. Dr. Michael Gude, CEO of Cologne Chip, explains: »I am particularly pleased that we were able to carry out this successful product development in cooperation with Globalfoundries. Our customers benefit from the European-based production at GFs Fab 1 in Dresden. Thus, the risk of trade restrictions or high customs duties is minimized with GateMate FPGA.« Dr. Thomas Morgenstern, SVP and Managing Director GF Dresden, adds: »GateMate is an excellent example of how innovative semiconductor solutions can be designed and manufactured in Europe. The combination of our low-power 28SLP technology with our manufacturing strength in Dresden and the deep design know-how of the Cologne-based development team have resulted in a new FPGA family that will make a difference in the markets it addresses.«
Features of GateMate-FPGAs:

  • Logic capacity: from 40.000 to more than 1 Mio. LUT 4 equivalent cells
  • Dual-port SRAM 1280 kbit
  • Three application modes: Low-power, economy, speed
  • FPGA in ball grid package for low size and high pin count
  • Only 2 signal layers on PCB necessary
  • General Purpose IOs (GPIOs), configurable as single-ended or differential (LVDS)
  • Low configuration bit count
  • Very fast configuration using 4 bit SPI interface up to 100 MHz
  • No excessive start-up currents
  • Multiple clocking schemas
  • Dual ported Block RAMs with 1-80 bit data width, also configurable as FIFO
  • Multipliers with arbitrary factor width implementable
  • SERDES 2,5 Gbit/s
  • Pullup/Pulldown resistors configurable
  • Support for ADC and DAC with additional IP cores
  • Core voltage depending on application mode: 0.9 V, 1.0 V, 1.1 V
  • EasyConvert software to migrate existing designs to GateMate
  • GateMate Place&Route with automatic clock Skew analysis and fixing
  • Static Timing Analysis for performance evaluation

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Cologne Chip AG, Globalfoundries