With the most cost-effective FPGAs against the Big Player

Substantial technical advantages

Gude is convinced that Cologne Chip has realized an FPGA architecture that stands out positively from competing approaches in the following points:

• 8 (instead of typically 4 to 6) combinatorial inputs with a so-called LUT tree
• CPE can be configured for 2 x 4 inputs or for 1 x 8 inputs
• two routable outputs
• six connections from one CPE directly to its neighbouring CPE
• two inputs and outputs for special functions, e.g. RAM connection
• CPE can be configured as two full-adders
• CPE can be configured as a 2x2-bit multiplication element.

This architecture brings concrete advantages. For example more inputs per LUT (from 6 to 8 inputs) significantly increase the combinatorial performance. In addition, »there are no clusters of eight elements, so the timing is largely homogeneous and no jumps occur, for example if you want to use 9 bits instead of 8 bits«, Gude continues. Furthermore, multipliers of any size can be realized, so that both AI (AI: artificial intelligence) and DSP functionalities of varying complexity are possible. And: »The chip area is not reduced by multipliers that may not be used«, Gude says.
In addition, by using different core voltages (0.9 V, 1.0 V, 1.1 V), the power consumption and speed of the FPGA can be adjusted. Gude: »A special feature here is that there are no speed grades or L-versions with GateMate. Each chip can be used in different ways. It is even possible to change the properties during operation.« The start- and stand-by power consumption is about 10 mA. Gude continues: »There are no increased start-up currents with GateMate like with other FPGAs.« Information on clock rates and speeds depends on the respective application circuit and is therefore difficult to give in general terms. Just: »In speed mode, circuits with a low logic depth achieve about 200 to 300 MHz,« says Gude
Gude also points out another unique feature of GateMate: a special chip technology that makes it possible to generate a large number of different FPGA sizes with one production mask set. »Each individual die on the wafer is connected to the neighbouring dies with over 1000 connections, so we can cut arrays of FPGAs of different sizes from the wafers. For further FPGAs, we then only have to adapt the corresponding packages and carry out the final test.« As a result, the timing on all partial dies is identical to the single die version and the RAM portion is also identical. Currently the single-die version, »CCGM1A1«, is available, in the second quarter production quantities should be available.

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Lowest specific costs

Cologne Chip claims for its GateMate FPGAs the "»owest specific costs on the market«. What does this mean? Gude: »This means the cost per usable circuit function, for example the cost per LUT4/FlipFlop function. According to our investigations, we are significantly better than our competitors. The absolute costs of an FPGA are also important. Because it is clear that you cannot put a 1000 dollar device into a device with a sales price of less than 1000 dollars. With our price starting at $10 in quantities, we believe that FPGAs can now be used in applications that were previously closed due to the cost of FPGAs.« From Gude's point of view, this point is also important because even today FPGAs are still relatively inefficient and therefore expensive compared to ASICs in terms of the circuit complexity that can be realized. »Therefore, it is particularly important that the circuit architecture is very efficient,« Gude continues.

Tools and services are available

One problem, with many newcomers to the FPGA market struggled, are the tools. But even this point is also no knock-out criteria for Cologne Chip, because according to Gude, Cologne Chip developed the entire tool chain for the physical implementation (mapping, placement and routing) of customer designs themselves. Gude emphasizes: »In doing so, we have relied on the best scientific findings, such as Bonntools. Our tool chain also integrates timing extraction and static timing analysis. And soon we will also support all common tools, especially open tools, for synthesis.«
In addition, Cologne Chip also offers a tool for porting existing FPGA designs to GateMate. A bit surprising, but Gude is convinced, »that our new GateMate FPGAs will be attractive first for customers who already use FPGAs. To make it as easy as possible for these customers to get started, there is a conversion tool that allows existing designs to be implemented quickly and easily without the need for new synthesis etc. I would like to emphasize that this way does not lead to worse results than a synthesis from HDL. Furthermore, we offer a free design conversion for our customers with this tool.«

GlobalFoundries is foundry partner

For GlobalFoundries Cologne Chip is the first company to use its manufacturing services to produce FPGAs. GateMate FPGAs are the first to be not only developed in Germany but also produced here. The Foundry uses its 28 nm SLP process for production. Compared to Intel or Xilinx, who use 10 or 7 nm processes for their latest FPGAs, the 28 nm SLP process is already old. So why doesn't Cologne Chip also use a more modern process? Gude: »We decided to use the 28 nm SLP variant from GlobalFoundries several years ago, at that time it was the most modern process available. But even today, this process technology offers advantages such as low costs and high production yield.«

1. With the most cost-effective FPGAs against the Big Player
2. Substantial technical advantages