Embedded Industry Is Getting Prepared
Into the Future with COM-HD
Artificial intelligence and 5G communication are rapidly driving performance demand. The embedded industry is responding with a new Computer-on-Module (CoM) concept: "COM-HD" is designed for PCI Express Gen4 and Gen5 and supports 100 Gbit/s Ethernet and USB 3.2, among others.
Adlink, congatec, and Kontron have now initiated the corresponding standardization process for "COM-HD" in the PICMG (PCI Industrial Computer Manufacturers Group).
The new Computer-on-Module standard COM-HD will coexist with the existing COM.0 standard (COM Express) and will not be a replacement for it. However, it clearly dethrones COM Express as a high-end for computer-on-modules with significantly higher connection speeds, more PCI Express lanes, and more space for memory (up to eight DIMM sockets).
COM-HD is expected to support at least two different module sizes, one for high-performance computing (160 mm × 160 mm) and one for embedded computing (120 mm × 120 mm). COM-HD will also use two new high-speed connectors with at least 4 × 100 pins - a total of 800+ pins.
The basis will be Samtec's ADF6/ADM6 series, but the row spacing will be increased and the end result will be usable for other manufacturers as well - single source is deliberately avoided here. The TDP (Thermal Design Power) is also important for embedded applications, so the HPC version is designed for processors between 35 W and 125 W heat output, the embedded version has to cope with 25 W to 65 W power dissipation. Corresponding cooling concepts and implementation ideas are to be anchored in the standard.
The high data rates or frequencies that the COM-HD modules can deliver must of course find their equivalent in the carrier boards - which is no trivial task. Therefore, a carrier design guide is an integral part of the new standard and is intended to help with high-speed routing as well as with the selection of the right PCB structure and material.
The specifications are not yet engraved in stone and the experience and suggestions of suppliers and users can be incorporated. However, the pin assignment should complete in Q1/2019, the rest of the specification in Q2/2019, and the Carrier Design Guide will follow in Q3/2019. A speed that is higher than that of many semiconductor manufacturers. In order to fully utilize the standard, one must probably wait some time for the corresponding semiconductor components - the standard therefore has a lot of upwards potential, which promises a long life span.
