Globalfoundries-CEO Caulfield "We're Going to Trigger a Whole New Wave of Innovation!"

Tom Caulfield, CEO von Globalfoundries: »Wir setzen auf hochspezialisierte Halbleiter und dafür bauen wir systematisch unsere bestehenden Fertigungstechniken zu Plattformen aus. Das ist unsere Strategie für die nächsten Jahre.«

Globalfoundries aims to increase sales to $8 billion by 2022 and is planning to go public. With its process platforms, the company wants to trigger a whole new wave of innovations. Markt&Technik spoke with the CEO of Globalfoundries, Dr. Thomas Caulfield, about the strategy of the company.

Markt&Technik: Globalfoundries will no longer develop processes for structures below 12 nm. Other foundries that do not participate in the race for the latest process technologies have not grown at an above-average rate. What makes Globalfoundries different?

Thomas Caulfield: We don't want what TSMC leaves behind, we are pursuing a completely new strategy by offering platforms that didn't exist before. It is completely wrong to assume that innovations are only possible via processes below 12 nm and even 7 nm. We developed our 45 nm process ten years ago, but we didn't stop there, we continued to optimize it, for example for high efficiency. This provides customers with significantly higher added value, for example in the 5G, ADAS and IoT environment in general. There are many companies that make 5G a reality, but one thing I can say for sure: Globalfoundries offers the manufacturing processes for key components without which 5G would hardly be possible.

But TSMC grows fastest with the latest process technologies?

That doesn't change one fundamental fact: 75 percent of the potential foundry business is in process nodes with structure sizes of 12 nm or larger. This corresponds to 47 billion dollars. Our goal for the coming years is to offer the really interesting innovations in process technology that bring added value to customers in this area. The success of AI will be largely determined by the Edge devices. In order to provide the suitable KI-ICs, ICs with structures below 12 or even 7 nm are not necessary. Here it depends on the architectures, they are much more important than the switching speed advantages of the individual transistors at 7 nm.

There has long been talk of the end of Moore´s Law. The fact that it is not always advantageous to squeeze all functions onto a SoC and produce MCMs instead is also well known, but has not yet established itself on a broad front …

...what's about to change. At the 7 nm level and below, the disadvantages of monolithic integration really come into their own. Because manufacturing SoCs will be very expensive, and it will only be worth it if there are huge quantities behind it. This simply no longer applies to industry, automotive engineering, medical technology, mobile communications infrastructure and many other areas. What is needed here is exactly what we do: To cast the functions into silicon on the basis of the most suitable process nodes that provide the optimum ratio of performance and efficiency. Because the optimum ratio is strongly dependent on the respective operating conditions, we need many processes tailored to this. This results in real innovations that bring added value to users. To do this, we need many different platforms - currently there are 15 - which we develop on the basis of processes down to 12 nm. It would not make sense to go any further for this purpose. Our strategy is to offer platform innovations instead of chasing after Moore´s Law. Of course, this includes the ecosystem with thousands of IPs and tens of thousands of specialized application solutions.

But advanced packaging techniques are also very expensive and have not been as widespread as they were ten or even twenty years ago. Why now?

Yes, the pendulum always struck back and forth. Sometimes it was cheaper under certain conditions to partition the functions to different dies, then the process technology for monolithic integration caught up again. That always went back and forth a bit. But now we have definitely reached a turning point: HF, for example, is always difficult to integrate on a single piece of silicon. Advanced packaging techniques are used here to combine the various functions in a single package or module. Let me give you an example: Five years ago, we had already developed a Through Silicon Via process. Back then, it was too early, too expensive. Now the TSV process makes economic sense.