Processor IP Verification Testing RISC-V Processor Cores for Conformity

Chip auf Leiterplatte mit 3D-IP-Blöcken
Verify conformity of RISC-V processor cores.

With the RISC-V Verification App, OneSpin Solutions provides a tool for verifying RISC-V IP implementations to ensure 100 % compliance with the instruction set architecture (ISA).

The RISC-V Verification App from OneSpin Solutions GmbH is the first app in the RISC-V Integrity Verification tool suite developed by OneSpin. The app provides the growing RISC-V community with a way to verify processor cores to ensure that no bugs go unnoticed during the development and integration of the RISC-V cores and that unrestricted compliance with the instruction set architecture (ISA) is ensured. Verification allows RISC-V core vendors to better compete with older, established instruction-set architectures.

The app takes only a week to set up and takes two hours to verify a complete RISC-V processor core. In comparison, other verification concepts can take months to set up a simulation, followed by weeks of regression testing, which can still leave critical bugs undetected. Formal methods use only partial verifications, cannot detect all hidden functions, and therefore result in incomplete verification.

Testing RISC-V Variants and Options

With the demand for the open source command set architecture RISC-V, quality requirements are also growing. A difficult challenge for verification is that the RISC-V-ISA allows not only numerous configuration options, but also a wide range of microarchitectures and allows the addition of custom additions.

The RISC-V Verification App from OneSpin Solutions, for the RISC-V Integrity Verification tool suite, addresses the verification challenges of RISC-V processor cores by capturing and verifying implementation variants such as microarchitecture and ISA options.

It identifies unspecified instructions and control and status registers (CSRs), captures and verifies the custom extensions allowed by RISC-V, and formally verifies core ISA compliance – captured by multiple SystemVerilog Assertions (SVAs). The RISC-V Verification App detects all conformance-related errors and, if no errors are found, can demonstrate 100% compliance.

The RISC-V Verification App has been tested on available open source RISC-V cores. The app discovered several bugs in the Rocket Core, which were confirmed by the developers and fixed in the Open Source Repository.