Design Practice RISC-V From the basics to the prototype

The Vega-Board is a multicore platform for projects with arm and RISC-V architecture.

The open RISC-V command architecture is intended to provide a command base that is both developmental and resource-effective. About 200 pages of documentation seem to show the binary structure for isolated and environment-dependent application scenarios in pedagogical language.

This breaks the explicit and implicit information asymmetry of some commercial command architectures at the binary level. Implicitly, since in principle a reduced set of 38 binary commands in hardware spans the complete application-specific command space and can explicitly be fully explored with the open-source promise. Then the learning curve of the developer determines the success of the implementation.

An exciting question, however, is to what extent this transparency can reduce complexity. The scope and transparency of a platform have historically grown not only through convenience or protectionism, but in the case of application actually as a result of the specific environment. If the language is simplified at the user level, the specific environment may have to be integrated with a higher degree of integration at the hardware level.

The present RISC-V practice report works from the machine command level to the physical layer. First, the design principles for isolated and peripheral applications of the official ISA specification [1,2] are developed. Following the records of DVCon Europe [3], it is shown what this specification means for chip design. Finally, the Vega board of, which carries two similar microcontrollers on the arm and RISC side, will be examined in a generic program and with the available debug tools.